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  solving the next generation service aggregation challenge... an example use of the iq2200 family iq2200 iq2200 specifications: performance:  400 mhz, 32-bit risc processors  single 25 mhz crystal drives all clocks i/o:  32-bit csix-l1 interface up to 166 mhz  gigabit ethernet macs on ports a, b, full-duplex  focus16: 1.6gbps@16-bit, full-duplex  focus32: 3.2gbps@32-bit, full-duplex  mips sysad bus: 100 mhz, 32/64-bit  32-bit asynchronous host interface  rambus memory controller supports 800 mhz and 1066 mhz direct rdram and so-rimm options electrical:  1.2v core  1.8v rambus rac  3.3v i/o  4w (typical)  6w (max) operating:  0 - 70 celsius mechanical:  673 pin bga, same as used by the iq2000 family highlights:  fully firmware-compatible and pin-compatible with iq2000  double the iq2000 performance at half the power with four, fully programmable, multi-context packet processing engines  flexible, high bandwidth i/o interface capability  high performance, patented internal architecture (100gb/s)  csix-l1 fabric interface  control plane processor independence (native support for mips, powerpc, and other risc implementations)  specialized co-processors for lookup, order management, multicast support, dma management, and context management  optimized instruction set for network operations  per flow queuing support for up to a half million flows.  hardware support for quality (qos) of service building blocks  comprehensive development tools  next generation service acceleration: mpls, diffserv, ipsec, provisioning, aaa, server load balancing, & more ideal applications: high port density applications  oc-3 to 2xoc12 atm/pos phy  10/100/1000 ethernet  channelized oc-3 to oc-12  ds0 - ds3 aggregation standalone or modular systems  intelligent edge devices  switches and routers  packet/voice gateways  service creation systems  security systems iq2200 network processor pb-iq2200p-001 network processor family what to look for:  exceptional processing capability  scaleable processing architecture  flexibility & programmability  optimized use of co-processors and high-performance memory  ?headroom? for emerging services  v ariety of open interconnect mechanisms  control plane processor independence  robust software development environment the iq2200 delivers:  complex multi-protocol routing  quality of service  classification  filtering  stateful inspection  t raffic policing  t raffic grooming/shaping  multicast/stream management  address translation 741 calle plano camarillo, ca 93012 t el: 805.388.3700 fax: 805.388.7565 www.vitesse.com y our partner for success. for more information on vitesse products visit the vitesse web site at www.vitesse.com or contact vitesse sales at (800) vitesse or sales@vitesse.com ?2002 vitesse semiconductor corporation the intelligent edge of the pdn transport core must provide both data aggregation and extensive ip services. although these two elements conceptually work closely together, today they are performed in entirely different products (aggregation and service delivery). link aggregation products take data that is transported over low speed links (or potentially multiple low speed links) and assemble this data into ip packets. this is a job of varying degrees of difficulty, depending on link type and aggregation methodology employed. once aggregation has occurred, services are applied on a variety of basis (flows within aggregated channels, micro- flows within flows, the channel itself, etc.). in this area, services are defined as ?value-added operations? performed on a packet (tagging for mpls, classification for diffserv, policy enforcement, and other sophisticated services). this design concept is unique because it provides the basis for collapsing two physically different components (with different architectures, different management facilities, and different provisioning facilities) into a single, highly integrated platform. platform block diagram: ip based service-enabled aggregation platform: iq2200 network processor atm oc12 pos oc3 atm oc3 pos ds3 atm ds3 dsl pos oc12 ds3 sar/framer sar/framer sar/framer mux framer a g g r e g a t i o n n e t w o r k ip control path software standard processor data path software network processor frabric oc48 pos framer programmable network processor programmable network processor b a c k b o n e n e t w o r k 220282,3_vitesse#3.qxd 4/19/02 10:46 am page 1
solving the next generation service aggregation challenge... an example use of the iq2200 family iq2200 iq2200 specifications: performance:  400 mhz, 32-bit risc processors  single 25 mhz crystal drives all clocks i/o:  32-bit csix-l1 interface up to 166 mhz  gigabit ethernet macs on ports a, b, full-duplex  focus16: 1.6gbps@16-bit, full-duplex  focus32: 3.2gbps@32-bit, full-duplex  mips sysad bus: 100 mhz, 32/64-bit  32-bit asynchronous host interface  rambus memory controller supports 800 mhz and 1066 mhz direct rdram and so-rimm options electrical:  1.2v core  1.8v rambus rac  3.3v i/o  4w (typical)  6w (max) operating:  0 - 70 celsius mechanical:  673 pin bga, same as used by the iq2000 family highlights:  fully firmware-compatible and pin-compatible with iq2000  double the iq2000 performance at half the power with four, fully programmable, multi-context packet processing engines  flexible, high bandwidth i/o interface capability  high performance, patented internal architecture (100gb/s)  csix-l1 fabric interface  control plane processor independence (native support for mips, powerpc, and other risc implementations)  specialized co-processors for lookup, order management, multicast support, dma management, and context management  optimized instruction set for network operations  per flow queuing support for up to a half million flows.  hardware support for quality (qos) of service building blocks  comprehensive development tools  next generation service acceleration: mpls, diffserv, ipsec, provisioning, aaa, server load balancing, & more ideal applications: high port density applications  oc-3 to 2xoc12 atm/pos phy  10/100/1000 ethernet  channelized oc-3 to oc-12  ds0 - ds3 aggregation standalone or modular systems  intelligent edge devices  switches and routers  packet/voice gateways  service creation systems  security systems iq2200 network processor pb-iq2200p-001 network processor family what to look for:  exceptional processing capability  scaleable processing architecture  flexibility & programmability  optimized use of co-processors and high-performance memory  ?headroom? for emerging services  v ariety of open interconnect mechanisms  control plane processor independence  robust software development environment the iq2200 delivers:  complex multi-protocol routing  quality of service  classification  filtering  stateful inspection  t raffic policing  t raffic grooming/shaping  multicast/stream management  address translation 741 calle plano camarillo, ca 93012 t el: 805.388.3700 fax: 805.388.7565 www.vitesse.com y our partner for success. for more information on vitesse products visit the vitesse web site at www.vitesse.com or contact vitesse sales at (800) vitesse or sales@vitesse.com ?2002 vitesse semiconductor corporation the intelligent edge of the pdn transport core must provide both data aggregation and extensive ip services. although these two elements conceptually work closely together, today they are performed in entirely different products (aggregation and service delivery). link aggregation products take data that is transported over low speed links (or potentially multiple low speed links) and assemble this data into ip packets. this is a job of varying degrees of difficulty, depending on link type and aggregation methodology employed. once aggregation has occurred, services are applied on a variety of basis (flows within aggregated channels, micro- flows within flows, the channel itself, etc.). in this area, services are defined as ?value-added operations? performed on a packet (tagging for mpls, classification for diffserv, policy enforcement, and other sophisticated services). this design concept is unique because it provides the basis for collapsing two physically different components (with different architectures, different management facilities, and different provisioning facilities) into a single, highly integrated platform. platform block diagram: ip based service-enabled aggregation platform: iq2200 network processor atm oc12 pos oc3 atm oc3 pos ds3 atm ds3 dsl pos oc12 ds3 sar/framer sar/framer sar/framer mux framer a g g r e g a t i o n n e t w o r k ip control path software standard processor data path software network processor frabric oc48 pos framer programmable network processor programmable network processor b a c k b o n e n e t w o r k 220282,3_vitesse#3.qxd 4/19/02 10:46 am page 1
iq2200 fabric interface csix/ focus32 focus32 optical interface (up to oc-48) gigabit phys focus16 10/100 oc-3 to oc-12 low speed aggregation fabric interface fabric interface csix/ focus16/32 csix/ focus16/32 gigabit phys focus16 iq2200 vsc2232 programmable network processor iq2200 vsc2202 programmable network processor iq2200 VSC2200 programmable network processor the iq2200 family delivers high performance network processing 4 high performance, load balanced cpus supports high-speed interfaces up to oc-48 packet order maintained throughout modular architecture provides for scaleable growth exceptional processing capability scaleable architecture flexibility/programmability co-processors headroom open interconnect a totally open, programmable solution, for providing next generation services uni-processor progamming model embedded function specific co-processors for qos, data movement, classification, lookup, and other functions more headroom than any npu vendor margin for future features through software upgrade open interconnect via partner devices (ds-0 to oc-48) and fabrics csix-l1 fabric interface control plane processor robust software development match the standard processor features/price to meet your requirements comprehensive hardware/software developers workbench iq2200 feature and part selection guide VSC2200 vsc2201 vsc2232 focus a focas b focus c focus d focas 16 focas 16 focas 16 focas 16 focus 16 focas 16 focus 32 focus 32 focus 32 focus 32 focus 32 focus 32 gigamac focas 16 focas 16 focas 16 gigamac focas 16 gigamac gigamac focas 16 focas 16 gigamac gigamac focas 16 focas 16 iq2200 part no. focus port configuration - - - - - - - - - = featured configuration * focus c & focus d ports also serve as the csix-l1 interface = featured not available the iq2200? family of network processors extends the successful vitesse iq2000 network processor family, doubling packet processing performance and improving switch fabric connectivity while maintaining firmware and pinout compatibility for rapid application. the iq2200 family is designed to deliver flexible, high-performance, deep-packet processing solutions at speeds ranging from ds0 to oc-48. applications for the iq2200 family include complex multi- protocol routing, classification, filtering, stateful inspection, encryption, policing/policy enforcement, traffic grooming/ shaping, multicast/stream management, network address translation, and other demanding packet processing operations. rapid system time-to-market can be dramatically improved when the iq2200 npu is coupled with other vitesse solutions including physical layer processing devices, traffic managers, and high speed switching fabrics. performance and flexibility: iq2200 family of network processors successfully meeting these challenges through standard products is key to maintaining a competitive edge. the iq2000 and iq2200 families enable innovation by providing a high performance, flexible solution that meets today?s challenges in networking and communication technology without the time-to-market constraints, fixed-function limitations, and short product life cycles associated with asic technology. service enablement: supports scaleable deployment of value-added ip services (from ds-0 to oc-48)  mpls  ipsec  diffserv  nat embedded hardware qos building blocks  rio  red  wred  rr  wrr  wfq open architecture: standards based compliance va riety of third party interfaces supported va riety of third party application specific processors supported (policy, security, encryption) va riety of fabrics supported through third party asics and fpgas robust development environment: comprehensive developer workbench high-performance debug tools powerful simulation and test environment performance optimization toolbox network software library (example code for routing, bridging, lookup functions, tagging, marking/re-marking, queuing, etc.) intelligent network apis optimized network-specific functions performance investment protection: programmability enables functional evolution with the emergence or revision of standards connectivity between npus delivers linear scaling of service delivery and performance, thus enabling terabit class system development architecture provides ?maximum headroom? for emerging ip service applications architecture provides backward compatibility from generation to generation risc development environment facilitates code portability, reuse and software investment protection control plane processor independence vsc2232: the vsc2232 network processor is targeted at the optical network intelligent edge. with the csix or focus32 interfaces, the vsc2232 supports connections to a wide variety of fabrics and optical network interfaces. vsc2202: the vsc2202 network processor is a gigabit ethernet enabled device well suited for server load balancing and service-enabled ethernet aggregation. with two gigabit ethernet macs and either one csix, or one focus32 or two focus16 interface(s), a variety of fabric or interface connections are possible. VSC2200: the VSC2200 member of the iq2200 family is available with either four focus16 interfaces or two focus16 interfaces and one csix or one focus32 interface. the iq2200 VSC2200 is ideally suited for service-enabled aggregation platforms providing aggregation at rates from ds0 to oc12. iq2200 family block diagram: change is constant... a fundamental shift is occurring in the network-hardware- manufacturing marketplace as demands for very high-speed, service-enabled products eclipse those for more traditional layer 2/3 routing and switching offerings. the combination of hardware acceleration needs, direct support for ip services/features, and demands for longer product life-cycles with reduced time to market, has given birth to the programmable network processor industry. hardware vendors are in need of an ?adjunct? processing solution that addresses both current and future challenges in network evolution; packet inputs packet outputs (provisioned and forwarded) optional sram rdram lookup bus sram bus standard cpu classification engines order management queue management qos engines input streaming bus cpu a cpu b cpu c cpu d output streaming bus host interface rambus memory controller sram interface iq2200 architecture: iq2200 220282,3_vitesse#3.qxd 4/19/02 10:46 am page 2
iq2200 fabric interface csix/ focus32 focus32 optical interface (up to oc-48) gigabit phys focus16 10/100 oc-3 to oc-12 low speed aggregation fabric interface fabric interface csix/ focus16/32 csix/ focus16/32 gigabit phys focus16 iq2200 vsc2232 programmable network processor iq2200 vsc2202 programmable network processor iq2200 VSC2200 programmable network processor the iq2200 family delivers high performance network processing 4 high performance, load balanced cpus supports high-speed interfaces up to oc-48 packet order maintained throughout modular architecture provides for scaleable growth exceptional processing capability scaleable architecture flexibility/programmability co-processors headroom open interconnect a totally open, programmable solution, for providing next generation services uni-processor progamming model embedded function specific co-processors for qos, data movement, classification, lookup, and other functions more headroom than any npu vendor margin for future features through software upgrade open interconnect via partner devices (ds-0 to oc-48) and fabrics csix-l1 fabric interface control plane processor robust software development match the standard processor features/price to meet your requirements comprehensive hardware/software developers workbench iq2200 feature and part selection guide VSC2200 vsc2201 vsc2232 focus a focas b focus c focus d focas 16 focas 16 focas 16 focas 16 focus 16 focas 16 focus 32 focus 32 focus 32 focus 32 focus 32 focus 32 gigamac focas 16 focas 16 focas 16 gigamac focas 16 gigamac gigamac focas 16 focas 16 gigamac gigamac focas 16 focas 16 iq2200 part no. focus port configuration - - - - - - - - - = featured configuration * focus c & focus d ports also serve as the csix-l1 interface = featured not available the iq2200? family of network processors extends the successful vitesse iq2000 network processor family, doubling packet processing performance and improving switch fabric connectivity while maintaining firmware and pinout compatibility for rapid application. the iq2200 family is designed to deliver flexible, high-performance, deep-packet processing solutions at speeds ranging from ds0 to oc-48. applications for the iq2200 family include complex multi- protocol routing, classification, filtering, stateful inspection, encryption, policing/policy enforcement, traffic grooming/ shaping, multicast/stream management, network address translation, and other demanding packet processing operations. rapid system time-to-market can be dramatically improved when the iq2200 npu is coupled with other vitesse solutions including physical layer processing devices, traffic managers, and high speed switching fabrics. performance and flexibility: iq2200 family of network processors successfully meeting these challenges through standard products is key to maintaining a competitive edge. the iq2000 and iq2200 families enable innovation by providing a high performance, flexible solution that meets today?s challenges in networking and communication technology without the time-to-market constraints, fixed-function limitations, and short product life cycles associated with asic technology. service enablement: supports scaleable deployment of value-added ip services (from ds-0 to oc-48)  mpls  ipsec  diffserv  nat embedded hardware qos building blocks  rio  red  wred  rr  wrr  wfq open architecture: standards based compliance va riety of third party interfaces supported va riety of third party application specific processors supported (policy, security, encryption) va riety of fabrics supported through third party asics and fpgas robust development environment: comprehensive developer workbench high-performance debug tools powerful simulation and test environment performance optimization toolbox network software library (example code for routing, bridging, lookup functions, tagging, marking/re-marking, queuing, etc.) intelligent network apis optimized network-specific functions performance investment protection: programmability enables functional evolution with the emergence or revision of standards connectivity between npus delivers linear scaling of service delivery and performance, thus enabling terabit class system development architecture provides ?maximum headroom? for emerging ip service applications architecture provides backward compatibility from generation to generation risc development environment facilitates code portability, reuse and software investment protection control plane processor independence vsc2232: the vsc2232 network processor is targeted at the optical network intelligent edge. with the csix or focus32 interfaces, the vsc2232 supports connections to a wide variety of fabrics and optical network interfaces. vsc2202: the vsc2202 network processor is a gigabit ethernet enabled device well suited for server load balancing and service-enabled ethernet aggregation. with two gigabit ethernet macs and either one csix, or one focus32 or two focus16 interface(s), a variety of fabric or interface connections are possible. VSC2200: the VSC2200 member of the iq2200 family is available with either four focus16 interfaces or two focus16 interfaces and one csix or one focus32 interface. the iq2200 VSC2200 is ideally suited for service-enabled aggregation platforms providing aggregation at rates from ds0 to oc12. iq2200 family block diagram: change is constant... a fundamental shift is occurring in the network-hardware- manufacturing marketplace as demands for very high-speed, service-enabled products eclipse those for more traditional layer 2/3 routing and switching offerings. the combination of hardware acceleration needs, direct support for ip services/features, and demands for longer product life-cycles with reduced time to market, has given birth to the programmable network processor industry. hardware vendors are in need of an ?adjunct? processing solution that addresses both current and future challenges in network evolution; packet inputs packet outputs (provisioned and forwarded) optional sram rdram lookup bus sram bus standard cpu classification engines order management queue management qos engines input streaming bus cpu a cpu b cpu c cpu d output streaming bus host interface rambus memory controller sram interface iq2200 architecture: iq2200 220282,3_vitesse#3.qxd 4/19/02 10:46 am page 2


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